(Photo courtesy of Texas Instruments.)
A new family of clock generators is available today, offering ultra-low jitter of 100 femtoseconds (fs) and flexible pin control options.
The LMK033x8 clock generator family from Texas Instruments offers jitter performance that will enable system designers to optimize system timing margins and bit error rate (BER) to reduce transmission errors.
This allows for more reliable communications, networking and high-performance industrial equipment.
The LMK033x8 family is available in two configurations: the single-PLL eight-output LMK03318 and the dual-PLL eight-output LMK03328. Both generators come in a 7mm x 7mm quad-flat no-lead (QFN) package.
The LMK033x8 family of clock generators offer features including:
- Ultra-low jitter performance, enabling flexible jitter budgeting: Up to two high-performance PLLatinum fractional-N phase-locked loops (PLLs) with eight outputs enable ultra-low jitter performance of 100 fs root mean square (RMS) over multiple integration bandwidths (1 KHz-5 MHz and 12 KHz-20 MHz). Designers can take advantage of the ultra-low jitter to manage system BER and the reliability of their telecommunications infrastructure equipment.
- Flexible configuration : A pin-mode control feature enables designers to select from 71 pre-programmed frequency startup plans compared to one-time programmable memory offered by competitors. Integrated electrically erasable programmable read-only memory (EEPROM) enables customization, while the I 2 C interface gives system designers control of device configuration.
- Reduced design cycle time: Fine/coarse frequency margining enables designers to simplify the stress and compliance testing of their systems during design verification and process verification (DVT/PVT) of prototypes.
- Immune to supply noise : Integrated low-dropout regulators (LDOs) provide immunity to power-supply noise without requiring complex filter designs.
Tools and Support to Aid Design
Aiming to reduce design cycle time by facilitating prototype design and evaluation, TI offers evaluation modules (EVMs) to help designers quickly and easily evaluate devices.
Support is also available through TI’s WEBENCH Clock Architect tool to help simplify the design process. The tool can recommend a single- or multiple-device clock-tree solution from a database of devices that can meet various system requirements.
For more information on the LMK033x8 family of clock generators click here .