(Image courtesy of Mentor Graphics.)
HyperLynx can help PCB design engineers perform signal and power integrity analysis, 3D electromagnetics simulations and rule checking within one platform.
“We have deployed a ‘shift left’ strategy where we perform simulation early in the design process to achieve ‘first time right’ products,” stated Hans Klos, CEO of Sintecs BV, Netherlands. “With the new, unified HyperLynx environment, we have one flow where we can do everything – a significant advantage.”
Using HyperLynx, engineers will be able to perform various 2D and 3D analyses in a single application with a unified graphic user interface (GUI). This will reduce the number of applications engineers will need to switch between when performing different PCB analyses. For instance, engineers will be able to simulate a Serializer/Deserializer (SerDes) channel and a large power net’s decoupling by selecting a new menu option.
“This version of HyperLynx is the culmination of intensive investment by Mentor in its high-speed tools,” stated A.J. Incorvaia, vice president at Mentor Graphics. “HyperLynx has long been a widely used high-speed tool in the industry; now it’s become the most powerful and best integrated as well. Designers who still think of HyperLynx as primarily ‘fast and easy SI’ need to take a serious, fresh look at how dramatically the product has strengthened and matured.”
Much of Mentor’s investment into HyperLynx has been for interconnect modeling. Other new capabilities of the software include the ability to perform geometry extraction and advanced material modeling such as wideband dielectrics, copper roughness and more.
The new release also comes with improvements to the electromagnetic solver, allowing it to perform 3D simulations. The solver is integrated into the HyperLynx system, so users will not have to learn a new interface.
Other solver improvements to the HyperLynx include:
- DC/IR-drop simulator
- Quasi-static 3D solver
- Pure power and mixed signal-and-power modeling
Another interesting feature is HyperLynx’s ability to collate simulation results into HTML reports to match the standards and protocols like DDRx memory and 100 GB/s Ethernet SerDes. HyperLynx uses a wizard to automate the whole-bus simulation and consolidate the data. This capability has now been extended to DDR4 and LPDDR4.
To see what else is new with HyperLynx, follow this link.