New Approach to Computer Chip Manufacturing Could Lead to Improved Electronics

Scanning electron micrograph images of self-assembled block copolymers. A new technique improves resolution and density of the desired patterns by tenfold (right; black bars indicate period of the initial template) and works even with 90-degree bends (left). Scale bars represent 200 nm. (Image courtesy of Scientific Reports.)
One of the main questions computer chip manufacturers ask themselves is how to squeeze more transistors onto their integrated circuits. Until recently, Moore’s Law has described their progress in that respect, with the number of transistors on chips doubling about every 18 months. In the past few years, however, this growth has slowed as we begin to reach physical limits—at some point, transistors become subject to quantum tunneling effects and controlling these effects is an area of active research.

Luckily, we haven’t reached that point yet, but figuring out exactly how to maximize the number of transistors on a chip is far from an open-and-shut case. A team of engineers has recently made some progress by devising a new manufacturing approach that’s faster, simpler, and less expensive than current techniques—and it could become a helpful tool in the pursuit of chip optimization.

 

Directed Self-Assembly

The team’s approach makes use of a technique called directed self-assembly (DSA), an augmentation of traditional manufacturing processes with self-assembling materials called block copolymers. The basic idea is that you outline the pattern that you want to create using conventional lithography and then add the block copolymers. Upon heating, the copolymers will “self-assemble” by following the outline and creating well-ordered patterns with a greater resolution than would otherwise be achievable.

The approach is novel due to a departure from conventional techniques used to create the initial pattern. The engineers started with a germanium wafer and used electron beam lithography and plasma etching to create the outline, made of a layer of graphene only one atom thick. Then, they spin-coated the wafer with a block copolymer called polystyrene-block-poly(methyl methacrylate), or PS-b-PMMA.

By heating the wafer at 250 ˚C, the PS-b-PMMA completely self-assembled in only 10 minutes, as opposed to the 30 minutes required for conventional chemical patterning methods. The new approach also resulted in fewer defects as well as a tenfold enhancement of pattern resolution, compared to a factor of four for conventional methods.

The initial outline (left) was made with a layer of one-atom-thick graphene on a germanium wafer. The block copolymers (PS-b-PMMA) followed this outline and self-assembled into the desired patterns (right). The scanning electron micrograph images at bottom contrast the before-and-after resolution, with the white scale bars representing 200 nm. (Image courtesy of Scientific Reports.)
“These templates offer an exciting alternative to traditional chemical patterns composed of polymer mats and brushes,” said Paul Nealy, a chemical engineer involved in the research. “They provide faster assembly kinetics and broaden the processing window, while also offering an inert, mechanically and chemically robust, and uniform template with well-defined and sharp material interfaces.”

The new approach may provide a starting point for even better manufacturing techniques, which could ultimately result in enhanced computer chips. Zhenqiang Ma, electrical engineer and researcher, is optimistic about the future potential.

“Using this one-atom-thick graphene template has never been done before,” Ma said. “It’s a new template to guide the self-assembly of the polymers. This is mass-production-compatible. We opened the door to even smaller features.”

To learn more about the new approach, you can read the team’s paper in Scientific Reports.