Smallest Transistor Ever Ditches Silicon to Achieve 1-Nanometer Gate

The prototype transistor uses a molybdenum disulfide channel and a 1-nm carbon nanotube gate. (Image courtesy of Sujay Desai/Berkeley Lab.)

Engineers are continually shrinking transistors, faithfully upholding Gordon Moore’s well-known prediction by halving transistor size roughly every 18 months. That’s why nobody really bats an eye when they hear about a new, even smaller transistor–it’s just business as usual.

Not this time.

Researchers from Berkeley Lab have developed the first transistor that breaks the projected physical limit of size scaling, crushing the record for world’s smallest transistor in the process.

Conventional transistors can’t really shrink below a 5 nm gate width, as quantum tunneling effects start to kick in and render them useless. The new prototype transistor has a gate width of only 1 nm–five times smaller than the projected limit–meaning Moore gets to be right for a few years longer.

Materials Make the Difference for Transistors

The key to getting past the 5-nm limit of conventional semiconductor technology was in the choice of materials. The team’s field effect transistor makes use of molybdenum disulfide (MoS₂) as a channel material instead of the conventional silicon and uses carbon nanotubes for the 1-nm gate.

One of the big differences between silicon and MoS₂ is the effective mass of the electrons flowing through their crystalline lattice structures. The effective electron mass in MoS₂(m_n*=0.55m₀) is almost three times as high as for silicon (m_n*=0.19m₀). This results in a significant reduction in tunneling leakage in the Off state of MoS₂ transistors. You probably won’t be surprised to learn there’s a trade-off: this also results in decreased On current.

Transmission electron microscope image of a cross-section of the transistor. It shows the 1-nanometer carbon nanotube gate and the molybdenum disulfide semiconductor separated by zirconium dioxide, which is an insulator. (Image courtesy of Qingxiao Wang/UT Dallas.)

Since conventional lithography doesn’t work too well at the 1-nm scale, the researchers needed an alternative way to construct their gate. Carbon nanotubes are hollow, cylindrical tubes with diameters as small as 1 nm, making them a natural choice for the team’s desired scale.

But the most important question about the 1-nm transistors is whether or not they work as required. Good news on that front: the researchers report excellent switching characteristics, with an impressive On/Off current ratio of ~10⁶.

The Tiny Transistors of Tomorrow

The prototype MoS₂ is an excellent step towards surpassing the 5 nm silicon limit, but the researchers have a ways to go before the technology is fit for practical use.

"This work demonstrated the shortest transistor ever," said team leader Ali Javey. "However, it's a proof of concept. We have not yet packed these transistors onto a chip, and we haven't done this billions of times over. We also have not developed self-aligned fabrication schemes for reducing parasitic resistances in the device. But this work is important to show that we are no longer limited to a 5-nanometer gate for our transistors. Moore’s Law can continue a while longer by proper engineering of the semiconductor material and device architecture."

You can read the team’s full paper in Science. To learn more about engineering tiny transistors, check out How to Build Nanoelectronic Devices Atom by Atom.