Electronics Weekly – New Synopsys Design Compiler, Maxim Integrated Boost Regulators & More

Altia Systems Micro Camera Module

(Image courtesy of Altia Systems.)

In this system, the PCVE software (which runs on the Snapdragon 820 processor by Qualcomm Technologies) integrates Altia's real-time video stitching IP to drive the newly-developed PanaCast micro camera module, delivering a 5.5 MP video stream with a ~130° field of view, with 3568 x 1536 pixels per frame, operating at 30 frames per second. The micro camera module consists of two standard 3 MP smartphone cameras operated synchronously, with standard fields of view for each camera.

Ram Natarajan, CTO of Altia Systems, stated that: “The technology is built on a smartphone platform and can be used to develop intelligent vision systems for a variety of applications, including IoT, AR/VR, analytics, machine learning, automotive, UAV, sports/events broadcasting, safety & security, telemedicine, education and entertainment.”

For more information, visit the company website.

Intersil Battery Pack Monitor

(Image courtesy of Intersil.)

Intersil recently announced the ISL94202 3-to-8 cell battery pack monitor, which supports lithium-ion and other battery chemistries. The integrated ISL94202 battery pack monitor enables small 2-terminal designs and accurately monitors, protects and cell balances rechargeable battery packs for safe operation and charging.

The ISL94202 operates as a stand-alone battery protection system using an internal state machine with five pre-programmed modes for balancing and controlling each battery cell. It monitors and protects the battery pack from catastrophic events such as hardware faults, short circuit conditions and cell voltage overcharge/over-discharge.

Designers can program the ISL94202 battery monitor's protection settings without requiring an external microcontroller. If required, the ISL94202 can also communicate with an external microcontroller via I²C serial bus.

The ISL94202 is available for purchase through the company’s website.

Source Photonics 400GBASE-FR8 OSFP Module

(Image courtesy of Source Photonics.)

Source Photonics has announced the first demonstration of a fully integrated 400GBASE-FR8 OSFP module. This represents the first duplex single mode fiber module with a form factor capable of supporting a 12.8Tb/s 1RU switch.

The company states that its OSFP module represents a fourfold improvement in faceplate density over current 3.2Tb/s switches supported by 100G QSFP28 LR4, CWDM4 and PSM4 modules. The module integrates 8 transmit and receive channels each operating at 50Gbps using 25Gbaud PAM4 modulation on both the electrical interface and the optical interface.

For more information, visit the company website.

Maxim Integrated Boost Regulator

(Image courtesy of Maxim Integrated.)

The MAX17222 nanoPower boost regulator from Maxim Integrated provides extended battery life in a small form factor for wearable and consumer IoT designs. According to the company, the 0.4V to 5.5V input, 1.8V to 5V output boost regulator with 500mA input current limit reduces solution size by up to 50 percent and offers 95 percent peak efficiency to minimize heat dissipation. These benefits are suitable for wearable devices, which IDC forecasts will experience a compound annual growth rate (CAGR) of 18.4 percent to 2020.

The MAX17222 is internally compensated and requires a single configuration resistor and small output filter for a full power solution. For ease of use, the boost regulator comes in density-optimized 0.88mm x 1.4mm 6-Bump WLP and 2mm x 2mm 6-Pin standard µDFN packages. It operates over the -40°C to +85°C temperature range.

For pricing and availability, visit the company website.

Synopsys' IC Compiler II Completes Certification for TSMC's 7-nm Process Technology

(Image courtesy of Synopsys.)

Synopsys recently announced that TSMC has certified the Synopsys Galaxy Design Platform for the V1.0 of its latest 7-nm FinFET process technology. Further collaborations, anchored around the Design Compiler Graphical and IC Compiler II digital implementation products, have supported TSMC's High Performance Compute (HPC) methodology to mutual customers for the 7-nm node.

A collaboration on via-structures, supported throughout the flow, is a key part of both 7-nm design and the 7-nm HPC flow deployment. The solution consists of performance exploration and what-if analysis of via-structures through Design Compiler Graphical as well as automatic creation and insertion in the IC Compiler II place-and-route flow coupled with PrimeTime ECO support that preserves and enhances via-pillar structures during final timing-signoff ECO stages.

IC Compiler II additionally brings signoff timing accuracy within the design-closure phase through the deployment of the PrimeTime timing analysis and signoff technology. A platform-wide deployment of Total-Power-Optimization technologies, including multi-bit-methodology support and advanced concurrent-clock-and-data optimization, furthers designers' ability to deliver differentiated, low-power products.

For more information about Synopsys’ IC Compiler II, visit the company website.

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