Electronics Weekly – Samsung Processors, Toshiba Flash Memory & More

Analog Devices REM Switch Chip

(Image courtesy of Analog Devices.)

Analog Devices has introduced a Real-time Ethernet, Multi-protocol (REM) switch chip as part of its generation of Ethernet connectivity solutions for connected motion and Intelligent Factory applications. The fido5000 is designed to reduce board size and power consumption while improving Ethernet performance at the node under any network load condition. Cycle times below 125µs are achievable and the chip comes with drivers to simplify integration with any Industrial Ethernet protocol stack.

For Intelligent Factory applications, the fido5000 can be integrated with any processor, protocol or stack, allowing for the incorporation of a single Industrial Ethernet interface that supports multiple protocols in an application. Since the fido5000 is “TSN-ready,” it provides a means to futureproof applications as Industrial Ethernet protocols evolve to the upcoming TSN (Time Sensitive Networking) standards.

For more information, visit Analog Devices’ website.

Microchip 32-Bit Microcontrollers

(Image courtesy of Microchip Technology.)

Microchip Technology Inc. has released the PIC32 family of microcontrollers (MCUs). The PIC32MK group features four integrated MCUs for precision dual motor control applications and eight MCUs packed with serial communication modules for general purpose applications. All MC devices feature a 120 MHz 32-bit core that supports Digital Signal Processor instructions. Additionally, to ease control algorithm development, a double-precision floating point unit is integrated into the MCU core enabling users to employ floating-point based modeling and simulation tools for code development.

To increase efficiency and decrease the number of discrete devices needed in motor control applications, the PIC32MK devices combines 32-bit processing with analog peripherals such as a quad 10 MHz op amp, high-speed comparators and motor-control optimized Pulse Width Modulation (PWM) modules.

The devices also have analog-to-digital converter modules capable of total throughput of 25.45 mega-samples per second (MSPS) in 12-bit mode or 33.79 MSPS in 8-bit mode. The devices come with up to 1 MB Live Update Flash, 4 KB of EEPROM and 256 KB SRAM.

For more details, visit Microchip’s website.

Samsung Exynos 9 Series Processor

(Image courtesy of Samsung.)

Samsung has announced the Exynos 9 Series of its application processors. This is Samsung’s first processor chipset to take advantage of 10-nanometer (nm) FinFET process technology with improved 3D transistor structure, which allows 27% higher performance while consuming 40% less power when compared to 14nm technology.

The Exynos 8895 is an octa-core processor, comprising of four of Samsung’s 2nd generation CPU cores in addition to four Cortex-A53 cores. It also has a separate processing unit for enhanced security required for mobile payments that use iris or fingerprint recognition as well as an embedded Vision Processing Unit (VPU) that can recognize and analyze items or movements for video tracking, panoramic image processing and machine vision technology.

The Exynos 8895 embeds a gigabit LTE modem that supports five carrier aggregation and delivers data throughput at max.1Gbps (Cat.16) downlink with 5CA, and 150Mbps (Cat.13) uplink with 2CA.

Information concerning pricing and availability can be found on Samsung’s website.

Synopsys PowerReplay Energy Analysis

(Image courtesy of Synopsys.)

Synopsys has announced the availability of its PowerReplay solution to enable gate-level power analysis with accuracy within 5% of power signoff. Energy efficiency has become a key criterion in complex designs that increasingly need to achieve stricter power targets. PowerReplay, in combination with Synopsys PX gate-level power analysis, enables SoC teams to achieve accurate power results earlier and perform design optimizations before the final power signoff.

PowerReplay's technology leverages readily available RTL simulation data to drive the gate-level netlist through an auto-generated gate-level environment, both at the block-level and at the full-chip level. Concurrent runs in conjunction with the targeted application of stimulus on specific areas of the design during key power consumption windows reduce turnaround time.

For more information, visit Synopsys’ website.

Toshiba BiCS Flash SSD

(Image courtesy of Toshiba.)

Toshiba has announced the debut of its 64-layer BiCS FLASH solid-state drive (SSD). BiCS FLASH is a three-dimensional flash memory stacked cell structure suitable for applications that require high capacity and performance, such as enterprise and consumer SSDs. The BiCS FLASH is based on the third generation 64-layer stacking process featuring 65% greater bit density per mm2 than the company’s 48-layer, 256GB device.

“The future of SSDs is 3D,” said Greg Wong, Founder and Principal Analyst of Forward Insights. “3D flash memory is enabling the production of higher capacity and more cost effective SSDs to better meet a variety of requirements across the consumer and enterprise spaces.”

Detailed schematics are available on Toshiba’s website.

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