EW - Design Edition – Silvaco Signal Simulation, Pantheon and Mozaix Updates & More

Cadence Accelerates SoC Design Delivery

(Image courtesy of Cadence Design Systems.)

Cadence Design Systems has announced expanded support for the ARM DesignStart program, including the added ARM Cortex-M3 processor and the ARM CoreLink SDK-100 System Design Kit, which features the CoreLink SSE-050 subsystem, enabling engineers to accelerate the delivery of mixed-signal internet of things (IoT) designs.

The Cadence Hosted Design Solutions design environment provides secure servers, storage, and EDA software accessible from anywhere in the world, incorporating Cadence mixed-signal tools that have been optimized for use with Cortex-M series processors. During the trial period, customers can experiment with the Cadence toolset via a self-paced tutorial for a sample mixed-signal IoT SoC design, incorporating subsystem design files for Cortex-M0 processors accessible under the DesignStart program.

Additional information on the Cadence support for the ARM DesignStart program is available on the company’s website.

Intercept Updates Pantheon and Mozaix Programs

(Image courtesy of Intercept Technology.)

Intercept Technology Inc. has announced the availability of a new release of its Pantheon PCB layout software, which includes RF and Hybrid design flows. In conjunction with the release is an update of Intercept’s Mozaix CAE schematic design software. The Mozaix version 5.0 and Pantheon version 7.2 releases are paired together with unified user interfaces, aiming for increased productivity for existing users and shorter ramp up time for new users. Both versions are fully compatible with Microsoft Windows 10 and Linux Redhat 6.

The Pantheon and Mozaix main windows have been optimized to place similar icon toolbars in the same locations in both applications, and window designs have been upgraded in Mozaix to include Pantheon's streamlined design for maximum screen space. The PDF output options in the latest version of Mozaix is a precursor to future planned improvements for Pantheon's integrated drawing and documentation capabilities, which are currently under development.

For more information, visit Intercept’s website.

Mentor Achieves ISO 26262 Qualification

(Image courtesy of Mentor.)

Mentor has achieved ISO 26262 compliance of documentation for its Oasys-RTL Physical RTL Synthesis, Nitro-SoC Place and Route, and FormalPro Logic Equivalency Checker products. Those three digital implementation and verification tools are a part of the Mentor Safe program, which is a comprehensive ISO 26262 qualification initiative.

Mentor Safe enables users to integrate Mentor tools and software into their safety-critical design and verification flows at all criticality levels from ASIL A to ASIL D.

Mentor’s tool qualification documentation provides the information necessary to evaluate use cases and confidence levels in qualifcations for automotive OEMs and their semiconductor suppliers. The reports demonstrate that the software tools are suitable to be used for any tool confidence level (TCL) activity or task required by the ISO 26262 standard.

“Achieving ISO 26262 qualification for our RTL-to-GDS implementation solutions is imperative for our automotive customers to seamlessly design their products,” said Shankar Krishnamoorthy, general manager of Mentor’s IC Design Solutions Division. “The ISO 26262 qualification of documentation for these products enables our customers to streamline critical IC design tasks while meeting the automotive industry’s stringent functional safety requirements.”

A list of Mentor Safe products and certifications can be found on the company’s website.

National Instruments System Design Software

(Image courtesy of National Instruments.)

National Instruments has introduced LabVIEW NXG 1.0, the first release of LabVIEW engineering system design software. LabVIEW NXG bridges the gap between configuration-based software and custom programming languages.

LabVIEW NXG is designed to help engineers perform benchtop measurements and increase their productivity with nonprogramming workflows, to acquire and iteratively analyze measurement data. These nonprogramming workflows can simplify automation by building the necessary code behind the scenes. For instance, engineers can drag and drop a section of code equivalent to 50 lines of text-based code.

The release also features a re-designed editor, extending LabVIEW’s integration with a broader set of languages. Furthermore, the editor improves programming productivity by streamlining the editor micro-interactions (user interface objects based on vector graphics and zooming capabilities).

For more information about LabView NGX, visit National Instruments’ website.

Silvaco Analog-Mixed Signal Simulation

(Image courtesy of Silvaco.)

Silvaco and ALDEC have collaborated to address the growing SoC mixed-signal verification challenge. The analog circuit component is handled by Silvaco’s SmartSpice, and the digital logic is simulated using ALDEC’s Riviera-Pro solution.

Silvaco’s Smartspice is a parallel SPICE simulator. Tested on designs worldwide down to 7nm FinFET, it provides both the capacity and capabilities needed for precision analog circuit simulation.

ALDEC’s Riviera-PRO enables the verification productivity, reusability, and automation by combining the simulation engine, debugging capabilities at different levels of abstraction, and support for the Language and Verification Library Standards. Together, the combined toolsets deliver the performance and capacity needed for today’s complex mixed-signal designs.

For more details on the science of analog-mixed signal simulation, visit Silvaco’s website.