FPGAs for the Internet of Things

At the annual Design Automation Conference (DAC) held earlier this summer in Austin, Tex., the first International Hardware Design Competition took place. The theme of the inaugural contest was Field Programmable Gate Arrays (FPGAs) in the Internet of Things (IoT).

The competition, which was sponsored by Lattice Semiconductor and SIGDA, was developed to encourage the development of hardware design in areas of interest. The fact that the IoT was chosen as the first such area of interest is hardly surprising, given its rapidly rising popularity.

Entrants to the competition, including over 30 engineering teams from both industry and academia, were given a selection of Lattice’s FPGA development boards to use in their designs. Apart from the FPGA, contestants could integrate whatever other components necessary, as long as their designs fit the framework of the IoT Edge.

The top three designs won awards of $2,500, $1,500, and $1,000 for their efforts. The winners were:

• First place: An audio-based IoT security system; the low-power, low-cost system uses custom machine learning to recognize screaming and gunshots
• Second place: A security solution for networked 3D printers
• Third place: An IoT node powered by multiple energy sources

One of the principles of the competition was that the designs remain opensourced, so if you’re interested in delving deeper into the winning entries, the designs are set to be published at some point (presumably, you’ll be able to access them on the official DAC contest page, although at the time of writing, they’ve yet to be released).

“There was tremendous response for this year’s International Hardware Design Contest, receiving more than 30 entries from nine different countries around the globe, and we couldn’t be more pleased with its success,” said Lattice Semiconductor’s Claude Moughanni. “The caliber of solutions developed and presented were diverse and highly creative. Submissions solved real-world problems in a dynamic IoT market, solving design challenges with Lattice’s edge-optimized low-power, small form factor FPGAs. We appreciated all the great submissions, and we look forward to more design contests to come.”