In the 21st century engineers are living in the nanoscopic era—and the times demand that computing devices are smaller and smaller every day. Accordingly, we are faced with the challenge of following Moor’s Law, according to which the processing speed of computer chips should be increased twofold every two years. Accomplishing this continued growth entails an increase of the number of transistors per square inch, and thereby the power density and the chip performance as well. At the same time, the price of the item should remain unchanged.
It is obvious that silicon-based transistors are reaching their size limits. The focus of engineers worldwide is to find a suitable alternative solution. It is beyond doubt that carbon nanotubes are the most promising material that could replace silicon, because of their many unique properties. One such property is, for instance, their high carrier mobility.
In 1998 the researchers from Delft University of Technology along with IBM built a transistor by using a semiconducting single-walled carbon atom, just 1 nanometer in diameter, that could operate at room temperature. Using this technology in commercial purposes has resulted in many technical challenges. Making the carbon nanotubes places too much emphasis on the minor details which makes them difficult for mass commercial production. The difficulty in this aspect is also that the process of making carbon nanotubes results in the nanotubes transistors to be even larger than silicon-based transistors if the optimal performance is required.
To overcome these difficulties, IBM researchers have recently made special transistor contacts which carry current through the nanotube transistor. Cobalt-molybdenum is used for making low resistance contacts that can bond directly to the nanotubes ends, thus saving valuable space.
The use of cobalt ensures that the bond can be established at a lower temperature. Reducing the reaction temperature allows making contacts and maintaining their structural integrity of under 20 nanometers gaps between the source and the drain electrodes. Researchers have succeeded in placing several parallel nanotube wires close to each other, thus increasing the total electrical current. Each nanotube is approximately 1.4 nanometers wide and 30 nanometers long. Higher current provides the fastest charging of the gate of the next device in the circuit.
IBM engineers managed to reduce the transistor’s total footprint to only 40 nanometers (silicon transistors are about 100 nanometers across), which was reported in Science.
The nanotubes transistors have a high potential for application in wireless communication devices where the relatively high current needs to flow through the small area.
The microchips based on nanotube transistors could be five times faster and use less energy than the silicon chips. According to IBM, such chips should be ready for commercial use around 2020.