Samsung recently announced the release of its third-generation Flashbolt High Bandwidth Memory 2E (HBM2E). The Flashbolt has a capacity of 16GB andtargets applications for supercomputers, AI-driven data analytics and graphics systems.
With twice the capacity of Samsung’s previous-generation 8GB Aquabolt, the Flashbolt increases performance and power efficiency by vertically stacking eight layers of 10nm-class (1y) 16Gb DRAM dies on top of a buffer chip.
The HBM2E package is interconnected in an arrangement of over 40,000 “through silicon via” (TSV) microbumps, with each 16Gb die containing over 5,600 of these microscopic holes.
The Flashbolt HBM2E has a data transfer speed of 3.2Gb/s, which is achieved by utilizing an optimized circuit design for signal transmission, and features a memory bandwidth of 410GB/s per stack.
The Flashbolt is also capable of attaining a transfer speed of 4.2Gb/s, which, according to the Samsung, is the maximum tested data rate to date. This will potentially allow the Flashbolt to provide up to a 538GB/s bandwidth per stack in future applications, and represents a 1.75x improvement over the Aquabolt’s 307GB/s.
“With the introduction of the highest performing DRAM available today, we are taking a critical step to enhance our role as the leading innovator in the fast-growing premium memory market,” said Cheol Choi, vice president at Samsung Electronics. “Samsung will continue to deliver on its commitment to bring truly differentiated solutions as we reinforce our edge in the global memory marketplace.”
Samsung will continue to produce the current Aquabolt memory while the production of its successor ramps up to a level of mass production, which is expected to occur in the first half of 2020.