Elevate Semiconductor has sponsored this post.
It’s an interesting time for the semiconductor industry. Pandemic-fueled chip shortages, geopolitical tension and an explosion of computing demand across all sectors are keeping the industry on its toes.
Against that backdrop, you could be forgiven for forgetting about another interesting issue: testing. As integrated circuits (ICs) become more complex, so too do their testing requirements. Nobody knows that better than Patrick Sullivan, founder and chief technology officer at Elevate Semiconductor, one of the world’s foremost providers of automated test equipment (ATE) integrated circuits.
“It’s a little bit like your sewer system. You don’t like to think about it. You don’t like to put a lot of money into it. But when it’s broken, you notice right away,” Sullivan explains in the latest episode of Manufacturing the Future, where he spoke at length about the challenges of IC testing, a crucial enabler of the entire semiconductor industry. To avoid becoming a bottleneck, testing needs to keep up with the times.
Honey, I Shrunk the Transistors
The history of electronics is one of miniaturization. From the earliest room-sized computers, filled to the rafters with bulbous vacuum tubes, to the latest laptop packing 40 billion transistors under one key of the keyboard, the past decades have borne witness to the exponential shrinkage of our electronic devices. Every order of magnitude down the ladder has been accompanied by new challenges in design, manufacturing and testing.
The current state of the art in transistor technology is measured in nanometers: 7nm, 5nm and even smaller. These are convenient labels more than literal gate dimensions, but they’re close enough and more useful descriptors than “really, really tiny” and “really, really, really tiny.”
“There are a lot of tricky problems to solve to enable 7nm and 5nm technologies to be tested efficiently,” Sullivan says.
One tricky problem is the necessity of developing new test ICs to handle the higher pin density of smaller geometries. Another problem is that their tolerances are incredibly tight, meaning device power supplies must be incredibly accurate. If the voltage bumps up even a little, it could damage the device under test, creating what Sullivan calls a “walking wounded” that will die an early death in the field. Power supplies must also be highly efficient to ensure that all of the available power goes to the device under test.
“We’re really getting pushed by our customers to make sure we have very low voltage, very high accuracy device power supplies,” Sullivan says.
On the other side of the spectrum, for voltage ranges on device power supplies, Sullivan points to Elevate Semiconductor’s Whitney chip, a dual channel power management unit (PMU) and digital-to-analog converter (DAC) solution designed for voltages from -60 to 60 volts.
“Whitney is significantly higher voltage than traditional ATE, which is typically around 15 volts. And we’ll actually use that architecture to push higher and higher voltages to try and meet the demand,” Sullivan says.
Chips are Getting More Complex
As chips shrink, they naturally become more complex, packed with more logic gates and computing capacity. But chips are becoming more complex in other ways. For one thing, chips are becoming increasingly integrated. A recent example comes from Apple, which is reportedly developing a single chip to provide Wi-Fi, Bluetooth and cellular functionality for its upcoming iPhones (current models split these functions across two separate chips from two suppliers). The more functions a chip provides, the more complex it is to design and test.
Many chips today are also highly specialized, such as chips for machine learning acceleration or the chips used in highly-regulated medical devices. Chip layouts are also adapting to the requirements of emerging technologies like 5G and 6G. Add on the uptick in novel semiconductor materials such as gallium nitride (GaN) and silicon carbide (SiC), and it’s clear that the variety and complexity of ICs has never been higher.
“The reality is test time with these incredibly complex chips is going through the roof,” Sullivan explains. He says that Elevate Semiconductor must look ahead at the changing requirements of the industry to ensure its ATE ICs will be ready for future needs—a difficult but necessary task to ensure that IC test equipment never falls behind the ICs themselves.
The cost of IC testing is another factor that ATE companies must keep in mind. Sullivan admits that it’s an industry-wide challenge to keep costs under control as testing requirements become more complex.
“Test cost used to be about 30 percent of the cost of a chip,” Sullivan says. “Everyone thought it was going to come down—and it started to—and then with these new technologies it starts creeping back up, and that’s the big problem.”
IC testing goes hand-in-hand with IC design, and engineers on both sides must plan carefully to ensure chips get a passing grade in time to hit the market window. It’s not easy, but with forward-thinking ATE companies on your side it can be a little easier.
For more information on the challenges of the ATE industry and how companies like Elevate Semiconductor are working to solve them, watch Patrick Sullivan in conversation with engineering.com’s Jim Anderton on the latest episode of Manufacturing the Future.